AMD Ryzen AI Max "Strix Halo"

AMD Strix Halo for AI Development

128GB Unified Memory. Zero PCIe Bottleneck. Local 70B Models.

AMD's most powerful APU combines Zen 5 CPU cores with an RDNA 3.5 integrated GPU and up to 128GB of shared LPDDR5X memory. Run large language models locally without discrete GPU VRAM constraints.

What AMD Strix Halo Actually Is

AMD Strix Halo, officially branded as Ryzen AI Max, is AMD's largest and most capable APU (Accelerated Processing Unit) to date. Unlike a traditional CPU that relies on a discrete graphics card for GPU compute, Strix Halo integrates a high-performance GPU directly onto the same silicon die as the CPU. This is not a token integrated graphics solution for desktop display output. It is a serious compute architecture designed for workloads that span both CPU and GPU domains, including AI inference, model development, content creation, and scientific simulation.

At the core, Strix Halo pairs up to 16 Zen 5 CPU cores (32 threads) with an RDNA 3.5 integrated GPU containing up to 40 compute units. That GPU is comparable in shader count to a discrete Radeon RX 7700 XT. The CPU side delivers single-threaded IPC improvements of roughly 16% over Zen 4, and the wide 16-core configuration offers serious multi-threaded throughput for data preprocessing, tokenization, and model compilation workloads that run on CPU.

The defining feature, the one that makes Strix Halo relevant for AI development in a way that no prior AMD APU has been, is its memory subsystem. Strix Halo supports up to 128GB of LPDDR5X memory in an eight-channel configuration, and that memory is fully unified. Both the CPU cores and the RDNA 3.5 GPU access the same physical memory pool without any copy operations or PCIe transfers. This is the same architectural principle that makes Apple Silicon compelling for large model inference, now available on x86.

Strix Halo at a Glance

CPU

16 Zen 5 Cores

32 threads, up to 5.1 GHz

GPU

40 RDNA 3.5 CUs

2,560 shaders, up to 2.9 GHz

Memory

128GB LPDDR5X

8-channel, unified CPU+GPU

NPU

XDNA 2 (50 TOPS)

Dedicated AI accelerator

The chip also includes an XDNA 2 neural processing unit rated at 50 TOPS (INT8), which handles lightweight always-on AI tasks like background noise suppression, camera effects, and Windows Copilot features. For serious ML workloads, the RDNA 3.5 GPU is the primary compute target, though the NPU can offload preprocessing in some deployment scenarios.

The Unified Memory Argument

The reason Strix Halo matters for AI is not raw compute. A discrete NVIDIA RTX 4090 or AMD Radeon RX 7900 XTX will outperform the integrated RDNA 3.5 GPU in pure TFLOPS. The reason Strix Halo matters is memory capacity and the elimination of the PCIe bottleneck.

In a traditional discrete GPU setup, model weights must be transferred from system RAM to GPU VRAM over a PCIe bus. PCIe 4.0 x16 delivers approximately 32 GB/s of practical bandwidth. PCIe 5.0 x16 doubles that to around 64 GB/s. This transfer creates a hard wall: if your model does not fit in VRAM, you must either quantize aggressively, split the model across multiple GPUs (which introduces synchronization overhead), or fall back to CPU-only inference at dramatically reduced speed.

An RTX 4090 has 24GB of GDDR6X. An RTX 5090 has 32GB of GDDR7. A Llama 2 70B model at full FP16 precision requires approximately 140GB. Even at 4-bit quantization, it needs around 35GB. You cannot run it on a single RTX 4090. You can run it on two RTX 4090 cards with tensor parallelism, but now you are managing multi-GPU overhead and paying for two $1,599+ GPUs plus a motherboard and power supply that supports them.

Strix Halo with 128GB of unified LPDDR5X eliminates this problem entirely. The GPU sees all 128GB as directly addressable memory. There is no PCIe transfer, no copy from host to device, no VRAM limitation. A 4-bit quantized 70B model loads into unified memory and the iGPU processes it in place. For inference workloads where the bottleneck is memory capacity rather than compute throughput, this architecture wins.

This is exactly the same architectural insight that made the Apple M1 Ultra, M2 Ultra, and M4 Max popular with ML researchers. Apple proved that unified memory APUs could run models that were previously datacenter-only. AMD is now bringing the same capability to the x86 ecosystem, with ROCm software compatibility and standard PC platform flexibility.

Why Unified Memory Changes the Equation

1.

No VRAM Wall

A 70B model at Q4 quantization requires ~35GB. A single RTX 4090 has 24GB. Strix Halo has 128GB. The model fits.

2.

Zero-Copy Data Path

CPU preprocesses data, GPU runs inference, same memory. No PCIe transfer latency. No cudaMemcpy. No host-to-device synchronization.

3.

Single System Simplicity

No multi-GPU communication fabric. No NVLink, no tensor parallelism configuration. One chip, one memory pool, one software target.

Memory Bandwidth: Where Unified Memory Wins and Where It Does Not

Unified memory solves the capacity problem. It does not solve the bandwidth problem. This distinction is critical for understanding where Strix Halo excels and where dedicated HBM still dominates.

Strix Halo's eight-channel LPDDR5X-7500 configuration delivers approximately 256 GB/s of memory bandwidth. That is shared between CPU and GPU, though in practice, during sustained GPU inference the CPU uses a small fraction and the GPU gets most of the bandwidth.

Memory Bandwidth Comparison

Platform Memory Type Capacity Bandwidth
AMD Strix Halo (top SKU) LPDDR5X-7500 (8ch) 128 GB ~256 GB/s
Apple M4 Max LPDDR5X-8533 (8ch) 128 GB ~546 GB/s
NVIDIA RTX 4090 GDDR6X (384-bit) 24 GB 1,008 GB/s
NVIDIA RTX 4090 Laptop GDDR6 (256-bit) 16 GB 576 GB/s
NVIDIA H100 SXM HBM3 (5120-bit) 80 GB 3,350 GB/s
AMD MI300X HBM3 (8192-bit) 192 GB 5,300 GB/s

The numbers tell a clear story. Strix Halo's 256 GB/s is a fraction of what dedicated GPU memory systems deliver. An RTX 4090 offers 4x the bandwidth; an H100 offers 13x. For compute-bound workloads like training transformers, matrix multiplication throughput scales directly with memory bandwidth, and Strix Halo cannot compete.

However, memory bandwidth is not the only bottleneck. For autoregressive inference (the token-by-token generation that LLMs perform), the bottleneck alternates between memory bandwidth (loading weights for each token) and memory capacity (fitting the model in the first place). A system with 256 GB/s bandwidth and 128GB capacity will generate tokens more slowly than an H100 with 3,350 GB/s, but it will generate them at all, whereas an RTX 4090 with only 24GB cannot even load the model.

Apple's M4 Max is the most direct competitor here. It matches Strix Halo's 128GB capacity but delivers roughly 2x the bandwidth at 546 GB/s, thanks to Apple's custom memory controller and wider bus. In tokens-per-second on equivalent models, the M4 Max will outperform Strix Halo on memory-bandwidth-bound inference. AMD's advantage is price (Strix Halo systems are significantly cheaper than comparable MacBook Pro configurations), x86 compatibility, ROCm/PyTorch ecosystem alignment, and upgradeability in desktop form factors.

ROCm and the Software Ecosystem: A Realistic Assessment

Hardware specs only matter if software can use them. The software story is where AMD's AI ambitions have historically stumbled, and where ROCm 6.x represents genuine progress alongside real remaining gaps.

What Works Well

PyTorch on ROCm is the flagship success story. AMD ships official PyTorch ROCm wheels, and the vast majority of standard training and inference code runs without modification. If your workflow is "load a HuggingFace model, run inference with transformers library, fine-tune with PEFT/LoRA," it works. The PyTorch ROCm backend is tested against the same CI suite as the CUDA backend, and AMD contributes directly to the PyTorch codebase.

ONNX Runtime supports ROCm as an execution provider, which means models exported from any framework can run on AMD GPUs through the ONNX path. This is particularly relevant for production inference deployments where you want framework-agnostic model serving.

llama.cpp and GGUF inference has native ROCm/HIP support. For running quantized LLMs locally, llama.cpp with ROCm offloading to the RDNA 3.5 iGPU is the most practical path on Strix Halo. The llama.cpp community actively tests on AMD hardware, and performance is competitive for inference workloads.

TensorFlow has a ROCm backend maintained by AMD, though it receives less attention than PyTorch. JAX ROCm support exists but is less mature. For new ML projects, PyTorch on ROCm is the path of least resistance.

Where Gaps Remain

CUDA kernel libraries. Any library that ships custom CUDA kernels and does not provide a HIP translation will not work. FlashAttention, one of the most important attention optimizations for transformer training, required a separate community port to ROCm (flash-attention-rocm). It works, but updates often lag the CUDA version. Libraries like xformers, bitsandbytes, and DeepSpeed have varying levels of ROCm support. Before committing to an AMD-based workflow, verify that every library in your dependency chain has ROCm compatibility.

Triton compiler. OpenAI's Triton is increasingly used for custom GPU kernels in ML. Triton's AMD backend is functional but less optimized than the NVIDIA backend. Kernel performance can be 20-40% lower on AMD for Triton-compiled code, though this gap is narrowing with each release.

RDNA 3.5 vs CDNA maturity. ROCm was originally developed for AMD's datacenter CDNA architecture (MI250X, MI300X). RDNA desktop and mobile GPU support was added later and is less battle-tested. Some ROCm features available on MI300X may not be fully optimized or available on RDNA 3.5. This is improving rapidly, but early adopters should expect occasional driver quirks.

ROCm Compatibility Quick Reference

Works Well

  • PyTorch (official ROCm wheels)
  • llama.cpp / GGUF inference
  • ONNX Runtime
  • HuggingFace Transformers
  • Ollama (ROCm backend)
  • vLLM (ROCm support)

Works with Caveats

  • FlashAttention (separate ROCm port)
  • TensorFlow (less tested)
  • Triton (functional, less optimized)
  • bitsandbytes (community port)
  • DeepSpeed (partial support)
  • JAX (experimental)

Head-to-Head: Strix Halo vs M4 Max vs RTX 4090 Laptop vs Discrete Workstation

Four very different approaches to AI development hardware. Each wins in specific scenarios.

Spec Strix Halo (395+) Apple M4 Max RTX 4090 Laptop Desktop RTX 4090
GPU Memory 128 GB (shared) 128 GB (shared) 16 GB dedicated 24 GB dedicated
Memory Bandwidth ~256 GB/s ~546 GB/s 576 GB/s 1,008 GB/s
FP16 Compute ~25 TFLOPS ~27 TFLOPS ~48 TFLOPS ~83 TFLOPS
CPU Cores 16 Zen 5 (32T) 16 (12P+4E) Varies by laptop Separate purchase
Total System TDP 45-120W (APU) ~40-92W (SoC) ~150-175W (GPU) 450W (GPU alone)
Max Model (Q4) ~200B params ~200B params ~24B params ~38B params
Software Stack ROCm / HIP MLX / Metal CUDA CUDA
Platform Windows / Linux macOS only Windows / Linux Windows / Linux

When Strix Halo Wins

Large model inference on a budget. If you need to run 70B+ parameter models locally and your budget is under $4,000, Strix Halo is the only viable option outside of Apple Silicon. A Strix Halo laptop with 128GB unified memory costs less than a MacBook Pro M4 Max with 128GB, runs standard x86 Linux, and avoids the macOS ecosystem lock-in.

Mobile AI development. No laptop with a discrete RTX 4090 can match 128GB of GPU-accessible memory. The 16GB VRAM on a laptop 4090 is a hard ceiling. If you develop AI applications while traveling and need to test against large models, Strix Halo delivers capability that no NVIDIA mobile GPU can.

Power-constrained environments. At 45-120W for the entire APU, Strix Halo draws a fraction of what a discrete GPU workstation consumes. For edge deployments, field offices, or any scenario where power budget matters, the efficiency advantage is substantial.

When the RTX 4090 Wins

Training and fine-tuning. If your model fits in 24GB of VRAM (which covers most models up to 13B at FP16, or up to ~38B at Q4), the RTX 4090's 83 TFLOPS of FP16 compute and 1,008 GB/s memory bandwidth will finish training runs 3-4x faster than Strix Halo. For LoRA fine-tuning of 7B-13B models, the 4090 is the clear winner.

CUDA ecosystem. The NVIDIA software ecosystem is mature, well-documented, and universally supported. Every ML library, every tutorial, every Stack Overflow answer assumes CUDA. If you want zero friction in your development workflow, NVIDIA remains the default. See our NVIDIA DGX page for enterprise-scale CUDA deployments.

When Apple M4 Max Wins

Memory bandwidth per watt. Apple's 546 GB/s at ~92W SoC power is unmatched. For inference throughput on large models (tokens per second per watt), the M4 Max leads. Apple's MLX framework is also remarkably simple to use, with a NumPy-like API that makes model porting straightforward. If you work in the Apple ecosystem and prioritize inference speed on large models, the M4 Max with MLX is the performance leader in the unified memory category.

Power Efficiency: Inference per Watt

Power efficiency is not just about electricity cost. It determines whether a system can run on battery, whether it needs active cooling infrastructure, and whether it is viable for edge deployments in locations without datacenter power.

Strix Halo's APU design has an inherent efficiency advantage over discrete GPU systems. A desktop RTX 4090 consumes 450W for the GPU alone, plus another 100-200W for the CPU, motherboard, and memory. Total system draw during AI inference is typically 500-650W. Strix Halo's entire system (CPU, GPU, memory controller, NPU) operates within a 45-120W envelope depending on the OEM's thermal design.

Power Consumption During LLM Inference

Strix Halo System

~85W

APU at sustained load

M4 Max MacBook

~72W

SoC at sustained load

RTX 4090 Laptop

~210W

GPU + CPU combined

Desktop RTX 4090

~580W

Full system draw

For edge inference scenarios where you are deploying a model at a remote site, in a vehicle, or at a branch office, the power profile of Strix Halo is transformative. You can run 70B model inference on a system that draws less power than a standard incandescent light bulb. A small UPS can keep a Strix Halo workstation running for hours during a power outage, something that is not practical with a 580W desktop workstation.

When you normalize for capability (specifically, the ability to run a 70B model), Strix Halo offers the best power-to-inference ratio of any x86 platform. A discrete GPU system cannot run the model at all within Strix Halo's power envelope. The only competitor in the same wattage class that can handle 70B inference is Apple Silicon.

In terms of tokens per second per watt on models that fit in all platforms (for example, a 7B model), the RTX 4090 desktop still wins because its raw compute throughput is much higher, and the model fits comfortably in 24GB VRAM. The efficiency argument only favors Strix Halo when the model exceeds discrete GPU VRAM capacity.

Best Use Cases for Strix Halo AI Development

Strix Halo is not the fastest AI chip. It is the most capable AI chip you can put in a laptop. That distinction defines its ideal use cases.

Mobile AI Development

Develop, test, and iterate on large language model applications from a laptop with full 70B model capability. No cloud dependency, no VPN to a remote GPU server. Test your RAG pipeline against a production-scale model while sitting in an airport.

Edge Inference Deployment

Deploy capable AI inference at branch offices, manufacturing floors, medical facilities, or field locations. The low power draw and compact form factor enable deployment where rack-mounted GPU servers are impractical. Data stays local for compliance.

Air-Gapped AI Operations

HIPAA, CMMC, and ITAR environments often prohibit cloud AI services. Strix Halo enables local LLM inference with no network connection required. Process sensitive documents, analyze classified data, or run compliance checks entirely offline.

Cost-Effective Dev Rigs

Equip a team of ML engineers with large-model capability at a fraction of the cost of multi-GPU workstations. A Strix Halo system with 128GB is significantly cheaper than two RTX 4090s plus a high-end motherboard, while offering superior model capacity.

Large Model Prototyping

Prototype and validate applications against 70B models locally before deploying to cloud or datacenter infrastructure. Verify prompt engineering, test guardrails, and validate output quality without paying cloud inference costs during development.

Hybrid CPU+GPU Workflows

Workloads that interleave CPU-heavy data preprocessing with GPU inference benefit from unified memory. Data flows from preprocessing to inference without any copy. Ideal for RAG pipelines, document processing, and multi-modal AI applications.

Honest Limitations

Strix Halo is not a replacement for datacenter GPUs, and it is not the right choice for every AI workload. Understanding its limitations is essential for making an informed hardware decision.

Training Throughput Is Limited

With ~25 TFLOPS of FP16 compute, Strix Halo is roughly 3x slower than a desktop RTX 4090 for training workloads that fit in VRAM. If you are training models from scratch or doing heavy fine-tuning, a discrete NVIDIA GPU (or a DGX system for enterprise scale) will deliver dramatically faster iteration cycles.

ROCm Ecosystem Maturity

CUDA has a decade head start. While ROCm covers the core frameworks (PyTorch, TensorFlow, ONNX Runtime), the long tail of ML tooling is CUDA-first. Custom CUDA kernels, niche research libraries, and some production inference frameworks may not support ROCm. Budget time for compatibility testing and potential workarounds in your project timeline.

No Multi-Node Interconnect

Strix Halo is a single-socket APU. There is no NVLink, no InfiniBand, no way to pool memory or compute across multiple chips for distributed training. If your model requires more than 128GB of memory or more compute than one APU provides, you need a different architecture entirely. Strix Halo does not scale horizontally for ML workloads.

Memory Bandwidth Ceiling

256 GB/s is adequate for inference on large models but noticeably slower than the 546 GB/s of Apple M4 Max or the 1,008 GB/s of a desktop RTX 4090. For latency-sensitive inference serving (low time-to-first-token requirements), this bandwidth gap translates directly to slower response times. High-throughput inference serving still benefits from dedicated HBM-equipped GPUs.

RDNA 3.5 iGPU Driver Maturity

ROCm on RDNA 3.5 integrated graphics is newer than ROCm on discrete RDNA or datacenter CDNA GPUs. Expect driver updates and bug fixes over the first year as AMD and the open-source community optimize the stack. Linux kernel 6.8+ and Mesa 24.0+ are recommended for the best experience. Windows ROCm support for RDNA iGPUs has additional limitations.

These limitations do not diminish what Strix Halo achieves. They define the boundary of its sweet spot. For inference on large models, mobile AI development, edge deployment, and cost-effective development workstations, Strix Halo fills a gap that no other x86 chip addresses. For training at scale, production inference serving, and workflows deeply embedded in the CUDA ecosystem, other hardware is the better choice. Petronella Technology Group helps you select the right tool for your specific workload. Call (919) 348-4912 to discuss your requirements with our AI engineering team.

Getting Started: Strix Halo for Local LLM Inference

Setting up a Strix Halo system for AI development involves three layers: hardware configuration, driver and runtime setup, and model optimization. Here is a practical overview of each.

Hardware Configuration

The most important configuration decision is memory capacity. Strix Halo SKUs ship with either 64GB or 128GB of LPDDR5X, and this memory is soldered (not upgradeable after purchase). If you plan to run models larger than 30B parameters, the 128GB configuration is essential. The 64GB variant limits you to approximately 30B models at Q4 quantization, which is still substantial but leaves less headroom for context windows, KV cache, and concurrent model loading.

For operating system, Linux is strongly recommended. Ubuntu 22.04 LTS or 24.04 LTS with kernel 6.8+ provides the best ROCm compatibility. Fedora 39+ and Arch Linux with recent kernels also work well. Windows is supported but ROCm functionality on Windows for RDNA iGPUs is more limited, and the open-source ML ecosystem is more thoroughly tested on Linux.

Software Stack

Install ROCm following AMD's official documentation for your Linux distribution. After ROCm installation, verify GPU detection with rocminfo and rocm-smi. The RDNA 3.5 iGPU should appear as an available device. Install PyTorch ROCm from the official PyTorch nightly channel, which includes pre-built wheels optimized for AMD GPUs.

For LLM inference specifically, llama.cpp with ROCm support is the recommended starting point. Build llama.cpp with -DGGML_HIPBLAS=ON to enable GPU offloading to the RDNA 3.5 iGPU. With 128GB of unified memory, you can offload all layers of a 70B Q4 model to the GPU, eliminating CPU fallback entirely. Alternatively, Ollama provides a user-friendly wrapper with automatic ROCm detection.

Model Selection and Quantization

For Strix Halo with 128GB, the sweet spot is 70B parameter models at Q4_K_M or Q5_K_M quantization. These deliver near-full-precision output quality while fitting comfortably in the available memory with room for context windows and KV cache. Specific recommended models include Llama 3.1 70B, Qwen 2.5 72B, DeepSeek V2 Lite, and Mixtral 8x7B (which fits entirely at FP16).

Avoid running models at FP16 precision unless they are under 40B parameters. While 128GB seems spacious, the KV cache for long context windows (32K+ tokens) consumes significant memory during inference, and you need headroom for the operating system and application overhead. A 70B model at FP16 (~140GB) will not fit in 128GB once you account for these overheads.

How Petronella Technology Group Supports Strix Halo Deployments

Petronella Technology Group configures and deploys AMD Strix Halo AI development workstations for organizations across the Raleigh-Durham area and nationwide. Our hardware engineering team handles every layer of the deployment.

Hardware Selection and Procurement

We identify the right Strix Halo SKU and OEM platform for your workload requirements, negotiate volume pricing, and handle the supply chain.

ROCm Stack Configuration

Linux installation, ROCm driver setup, PyTorch ROCm configuration, llama.cpp compilation with GPU offloading, and end-to-end validation against your target models.

Model Optimization

Quantization strategy selection, KV cache tuning, batch size optimization, and performance benchmarking to maximize tokens per second on your specific models.

Compliance Hardening

Encryption, access controls, audit logging, and network segmentation for HIPAA, CMMC, and NIST 800-171 environments. Our team is fully CMMC-RP certified.

Whether you need a single Strix Halo development laptop for a machine learning engineer, a fleet of edge inference nodes for branch offices, or a cost-effective alternative to cloud GPU instances for your AI development team, Petronella builds the complete solution. We also deploy AI development systems based on NVIDIA discrete GPUs for workloads where CUDA and raw compute throughput are the priority.

Frequently Asked Questions

Yes. With 128GB unified LPDDR5X, a 70B model at Q4 quantization (~35-40GB) fits entirely in the memory pool shared by CPU and GPU. The iGPU processes it in place with no PCIe transfer overhead. For full FP16 precision (~140GB), you would need CPU offloading with partial GPU acceleration, which is slower but functional.

Both offer 128GB unified memory. Apple wins on memory bandwidth (~546 vs ~256 GB/s) and software polish (MLX). AMD wins on raw GPU compute (40 RDNA 3.5 CUs), x86/Linux compatibility, ROCm/PyTorch ecosystem alignment, and cost. For teams already working in the PyTorch/Linux ecosystem, Strix Halo avoids the macOS platform switch.

ROCm 6.x supports PyTorch, TensorFlow, JAX, and ONNX Runtime with official AMD builds. PyTorch ROCm is the most mature, with nightly builds and broad operator coverage. Gaps remain in custom CUDA kernel ports (FlashAttention has a separate ROCm version), Triton compiler optimization, and some niche libraries. For RDNA 3.5 iGPUs specifically, support is newer than datacenter MI300X but improving rapidly.

For models under 24GB (most models up to ~38B at Q4), the RTX 4090 is faster due to 83 TFLOPS compute and 1,008 GB/s bandwidth. For models that exceed 24GB VRAM, Strix Halo with 128GB unified memory is the only single-chip solution that can load the model at all. Choose based on your model size requirements.

The full APU operates within a 45-120W configurable TDP range, depending on OEM thermal design. Laptop implementations typically run at 45-80W. Compare this to 450W for a desktop RTX 4090 GPU alone. Strix Halo enables battery-powered AI development that no discrete GPU system can achieve.

Yes. Petronella Technology Group configures AMD Strix Halo workstations for AI development, edge inference, and local LLM deployment. We handle hardware selection, ROCm stack configuration, model optimization, and compliance hardening for regulated industries. Call (919) 348-4912 for a consultation.

No. CUDA is proprietary to NVIDIA. Strix Halo uses AMD's ROCm stack with a HIP translation layer that converts most CUDA code with minimal changes. PyTorch and TensorFlow have native ROCm backends, so high-level ML code runs without modification. Workflows depending on CUDA-specific libraries without ROCm equivalents still require NVIDIA hardware.

Build Your Strix Halo AI Workstation

From a single developer laptop to a fleet of edge inference nodes, Petronella Technology Group configures AMD Strix Halo systems optimized for your AI workloads. ROCm setup, model optimization, and compliance hardening included.

Call now for a free hardware consultation. We will recommend the right configuration for your models, budget, and compliance requirements.

Petronella Technology Group | 5540 Centerview Dr, Suite 200, Raleigh, NC 27606 | Since 2002

Petronella Technology Group

5540 Centerview Dr, Suite 200, Raleigh, NC 27606

(919) 348-4912 | Founded 2002 | 2,500+ Clients

CMMC-RP Certified Team: Craig Petronella, Blake Rea, Justin Summers, Jonathan Wood

Craig Petronella: CMMC-RP, CCNA, CWNE, DFE #604180